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» System Level Modelling for Hardware Software Systems
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MSS
2005
IEEE
112views Hardware» more  MSS 2005»
16 years 1 months ago
Violin: A Framework for Extensible Block-Level Storage
Storage virtualization is becoming more and more important due to the increasing gap between application requirements and the limited functionality offered by storage systems. In...
Michail Flouris, Angelos Bilas
ISCAS
2007
IEEE
92views Hardware» more  ISCAS 2007»
16 years 1 months ago
Macroblock-Level Adaptive Scan Scheme for Discrete Cosine Transform Coefficients
—Discrete Cosine Transform (DCT) has been widely used in image/video coding systems, where zigzag scan is usually employed for DCT coefficient organization. However, due to local...
Li Zhang, Wen Gao, Qiang Wang, Debin Zhao
ICCAD
2000
IEEE
100views Hardware» more  ICCAD 2000»
15 years 12 months ago
Automated Data Dependency Size Estimation with a Partially Fixed Execution Ordering
For data dominated applications, the system level design trajectory should first focus on finding a good data transfer and storage solution. Since no realization details are avail...
Per Gunnar Kjeldsberg, Francky Catthoor, Einar J. ...
INFOCOM
2003
IEEE
16 years 22 days ago
User-Level Performance of Channel-Aware Scheduling Algorithms in Wireless Data Networks
— Channel-aware scheduling strategies, such as the Proportional Fair algorithm for the CDMA 1xEV-DO system, provide an effective mechanism for improving throughput performance in...
Sem C. Borst
ISQED
2009
IEEE
187views Hardware» more  ISQED 2009»
16 years 2 months ago
An efficient current-based logic cell model for crosstalk delay analysis
 Electrical Modeling for High Bandwidth IO Link  Chirayu Amin, Chandramouli Kashyap ¬ Intel Corp., Hillsboro, OR  Prateek Bhansali ¬ Univ. of Minnesota, Mi...
Debasish Das, William Scott, Shahin Nazarian, Hai ...