12333 search results - page 647 / 2467 » System Level Modelling for Hardware Software Systems |
158
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DATE
2005
IEEE
16 years 25 days ago
2005
IEEE
In this paper we present our contribution in terms of synchronization processor for a SoC design methodology based on the theory of the latency insensitive systems (LIS) of Carlon...
208
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TASLP
2010
15 years 1 months ago
2010
The ability of the human auditory system for sound localization mainly depends on the binaural cues, especially interaural time and level differences (ITD and ILD). In the context ...
184
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ICCAD
2001
IEEE
16 years 4 months ago
2001
IEEE
In this paper we describe a software pipelining framework, CALiBeR (Cluster Aware Load Balancing Retiming Algorithm), suitable for compilers targeting clustered embedded VLIW proc...
178
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CASES
2009
ACM
15 years 11 months ago
2009
ACM
2's complement number system imposes a fundamental limitation on the power and performance of arithmetic circuits, due to the fundamental need of cross-datapath carry propaga...
213
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ISSRE
2008
IEEE
16 years 1 months ago
2008
IEEE
For many safety-critical systems a safety case is built as part of the certification or acceptance process. The safety case assembles evidence to justify that the design and imple...