Sciweavers

12333 search results - page 469 / 2467
» System Level Modelling for Hardware Software Systems
Sort
View
CODES
1997
IEEE
15 years 11 months ago
Optimizing communication in embedded system co-simulation
The Pia hardware-software co-simulator provides substantial speedups over traditional co-simulation methods by permitting dynamic changes in the level of detail when simulating co...
Ken Hines, Gaetano Borriello
SIGMETRICS
2008
ACM
130views Hardware» more  SIGMETRICS 2008»
15 years 6 months ago
Using probabilistic model checking in systems biology
Probabilistic model checking is a formal verification framework for systems which exhibit stochastic behaviour. It has been successfully applied to a wide range of domains, includ...
Marta Z. Kwiatkowska, Gethin Norman, David Parker
CAV
1997
Springer
202views Hardware» more  CAV 1997»
15 years 11 months ago
HYTECH: A Model Checker for Hybrid Systems
A hybrid system is a dynamical system whose behavior exhibits both discrete and continuous change. A hybrid automaton is a mathematical model for hybrid systems, which combines, i...
Thomas A. Henzinger, Pei-Hsin Ho, Howard Wong-Toi
COMPSYSTECH
2009
15 years 4 months ago
Architectural models for realization of web-based personal health systems
: Recent advances in Information and Communication Technologies (ICT) and more specifically in wireless networks and mobile computing have driven new directions in the development ...
Mitko Shopov, Grisha Spasov, Galidia Petrova
EUROSYS
2011
ACM
14 years 10 months ago
SRM-buffer: an OS buffer management technique to prevent last level cache from thrashing in multicores
Buffer caches in operating systems keep active file blocks in memory to reduce disk accesses. Related studies have been focused on how to minimize buffer misses and the caused pe...
Xiaoning Ding, Kaibo Wang, Xiaodong Zhang