12333 search results - page 468 / 2467 » System Level Modelling for Hardware Software Systems |
187
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DSD
2010
IEEE
15 years 4 months ago
2010
IEEE
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
212
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CODES
2003
IEEE
16 years 5 days ago
2003
IEEE
In the Sesame framework, we develop a modeling and simulation environment for the efficient design space exploration of heterogeneous embedded systems. Since Sesame recognizes se...
159
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ISSS
2002
IEEE
15 years 11 months ago
2002
IEEE
In existing synthesis systems, the influence of the area and delay of the controller is not or not sufficiently taken into account. But the controller can have a big influence,...
168
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ISCA
1998
IEEE
15 years 11 months ago
1998
IEEE
Accurate branch prediction is essential for obtaining high performance in pipelined superscalar processors that execute instructions speculatively. Some of the best current predic...
208
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DATE
2003
IEEE
16 years 5 days ago
2003
IEEE
In this paper we present the results of a set of experiments we conducted in order to evaluate the viability of the behavioral synthesis, relying on the tools available at the mom...