12333 search results - page 437 / 2467 » System Level Modelling for Hardware Software Systems |
184
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HIPEAC
2005
Springer
16 years 11 days ago
2005
Springer
In DRM domain, the adversary has complete control of the computing node - supervisory privileges along with full physical as well as architectural object observational capabilities...
184
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ISCA
2008
IEEE
15 years 6 months ago
2008
IEEE
Current hardware transactional memory systems seek to simplify parallel programming, but assume that large transactions are rare, so it is acceptable to penalize their performance...
165
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HPCA
2007
IEEE
16 years 7 months ago
2007
IEEE
This paper proposes a hardware transactional memory (HTM) system called LogTM Signature Edition (LogTM-SE). LogTM-SE uses signatures to summarize a transaction's readand writ...
175
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SOSP
2001
ACM
16 years 3 months ago
2001
ACM
In most distributed systems, naming of nodes for low-level communication leveragestopologicallocation(such as node addresses) and is independentof any application. In this paper, ...
177
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KBSE
2010
IEEE
15 years 5 months ago
2010
IEEE
Variability models represent the common and variable features of products in a product line. Several variability modeling languages have been proposed in academia and industry; ho...