Sciweavers

12333 search results - page 314 / 2467
» System Level Modelling for Hardware Software Systems
Sort
View
EMSOFT
2001
Springer
15 years 11 months ago
Some Synchronization Issues When Designing Embedded Systems from Components
Abstract This paper is sort of a confession. Issues of synchrony, asynchrony, and synchronization, arise frequently in designing embedded systems from components, like everyone I k...
Albert Benveniste
GECCO
2004
Springer
148views Optimization» more  GECCO 2004»
16 years 1 days ago
A Multi-objective Approach to Configuring Embedded System Architectures
Portable embedded systems are being driven by consumer demands to be thermally efficient, perform faster, and have longer battery life. To design such a system, various hardware un...
James Northern III, Michael A. Shanblatt
DATE
2002
IEEE
105views Hardware» more  DATE 2002»
15 years 11 months ago
Power-Manageable Scheduling Technique for Control Dominated High-Level Synthesis
Optimizing power consumption at high-level is a critical step towards power-efficient digital system designs. This paper addresses the power management problem by scheduling a giv...
Chunhong Chen, Majid Sarrafzadeh
179
Voted
DATE
2000
IEEE
139views Hardware» more  DATE 2000»
15 years 11 months ago
Target Architecture Oriented High-Level Synthesis for Multi-FPGA Based Emulation
This paper presents a new approach on combined highlevel synthesis and partitioning for FPGA-based multi-chip emulation systems. The goal is to synthesize a prototype with maximal...
Oliver Bringmann, Wolfgang Rosenstiel, Carsten Men...
ASAP
2006
IEEE
119views Hardware» more  ASAP 2006»
15 years 8 months ago
From Bit Level Systolic Arrays to HDTV Processor Chips
The paper starts presents the work initially carried out by Queen's University and RSRE (now Qinetiq) in the development of advanced architectures and microchips based on sys...
John V. McCanny, Roger F. Woods, John G. McWhirter