12333 search results - page 312 / 2467 » System Level Modelling for Hardware Software Systems |
199
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CORR
2004
Springer
15 years 6 months ago
2004
Springer
Abstract -- The development of cost-effective highperformance parallel computing on multi-processor supercomputers makes it attractive to port excessively time consuming simulation...
223
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ECOOP
2001
Springer
15 years 11 months ago
2001
Springer
Features are essential characteristic of applications within a product line. Features organized in different kinds of diagrams containing hierarchies of feature trees are closely ...
143
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DATE
2007
IEEE
16 years 1 months ago
2007
IEEE
In this paper we propose a hardware real time operating system (HW-RTOS) that implements the OS layer in a dual-processor SMP architecture. Intertask communication is specified b...
181
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ISSRE
2003
IEEE
15 years 12 months ago
2003
IEEE
Many architecture–based software reliability models were proposed in the past. Regardless of the accuracy of these models, if a considerable uncertainty exists in the estimates ...
190
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ASPLOS
2011
ACM
14 years 10 months ago
2011
ACM
Transactional memory (TM) is a promising synchronization mechanism for the next generation of multicore processors. Best-effort Hardware Transactional Memory (HTM) designs, such a...