12333 search results - page 247 / 2467 » System Level Modelling for Hardware Software Systems |
171
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ASAP
2005
IEEE
16 years 6 days ago
2005
IEEE
In this paper we introduce a design methodology that allows the system/circuit designer to build reliable systems out of unreliable nano-scale components. The central point of our...
175
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ARCS
1997
Springer
15 years 10 months ago
1997
Springer
To provide a computing system to be dependable fault tolerance mechanisms have to be included. Especially massive parallelism represents a new challenge for fault tolerance. In th...
158
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IWPC
2000
IEEE
15 years 11 months ago
2000
IEEE
The Java programming language has gained increasing importance for the development of embedded systems. To be cost efficient, such systems have to cope with significant hardware...
139
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
A new approach in hierarchical optimisation is presented which is capable of optimising both the performance and yield of an analogue design. Performance and yield trade offs are ...
182
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VTC
2010
IEEE
15 years 4 months ago
2010
IEEE
—In order to evaluate the performance of new mobile network technologies, system level simulations are crucial. They aim at determining whether, and at which level predicted link...