12333 search results - page 229 / 2467 » System Level Modelling for Hardware Software Systems |
166
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DATE
2010
IEEE
15 years 11 months ago
2010
IEEE
Abstract—This paper addresses the problem of execution time estimation for tasks in a software pipeline independent of the application structure or the underlying architecture. A...
150
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HPDC
1993
IEEE
15 years 10 months ago
1993
IEEE
Building the hardware for a high-performance distributed computer system is a lot easier than building its software. In this paper we describe a model for programtributed systems ...
169
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DATE
2008
IEEE
16 years 1 months ago
2008
IEEE
Transaction Level Modeling (TLM) is an emerging design practice for overcoming increasing design complexity. It aims at simplifying the design flow of embedded systems ning and v...
163
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ISMVL
2007
IEEE
16 years 25 days ago
2007
IEEE
Designing modern circuits comprised of millions of gates is a very challenging task. Therefore new directions are investigated for efficient modeling and verification of such syst...
208
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ISCA
2012
IEEE
13 years 9 months ago
2012
IEEE
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...