Sciweavers

12333 search results - page 1981 / 2467
» System Level Modelling for Hardware Software Systems
Sort
View
ASPDAC
2009
ACM
152views Hardware» more  ASPDAC 2009»
16 years 1 months ago
A control theory approach for thermal balancing of MPSoC
— Thermal balancing and reducing hot-spots are two important challenges facing the MPSoC designers. In this work, we model the thermal behavior of a MPSoC as a control theory pro...
Francesco Zanini, David Atienza, Giovanni De Miche...
DATE
2008
IEEE
138views Hardware» more  DATE 2008»
16 years 1 months ago
Dynamic Task Allocation Strategies in MPSoC for Soft Real-time Applications
This work evaluates task allocation strategies based on bin-packing algorithms in the context of multiprocessor systems-on-chip (MPSoCs) with task migration capabilities, running ...
Eduardo Wenzel Brião, Daniel Barcelos, Fl&a...
APCCAS
2006
IEEE
233views Hardware» more  APCCAS 2006»
16 years 28 days ago
Jointly Optimized Modulated-Transmitter and Receiver FIR MIMO Filters
— In recent years, several approaches have been proposed aiming the optimal joint design of finite impulse response (FIR) multiple-input multiple-output (MIMO) transmitter and r...
Guilherme Pinto, Paulo S. R. Diniz, Are Hjø...
DATE
2006
IEEE
100views Hardware» more  DATE 2006»
16 years 28 days ago
Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
Luciano Bononi, Nicola Concer
WORDS
2002
IEEE
15 years 11 months ago
Writing Temporally Predictable Code
The Worst-Case Execution-Time Analysis (WCET Analysis) of program code that is to be executed on modern processors is a highly complex task. First, it involves path analysis, to i...
Peter P. Puschner, Alan Burns
« Prev « First page 1981 / 2467 Last » Next »