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ASPDAC
2004
ACM
109views Hardware» more  ASPDAC 2004»
16 years 9 days ago
Resource-constrained low-power bus encoding with crosstalk delay elimination
— In deep-submicron (DSM) technology, minimizing power consumption of a bus is one of the most important design objectives in embedded system-on-chip (SoC) design. In this paper,...
Meeyoung Cha, Chun-Gi Lyuh, Taewhan Kim
CISIS
2010
IEEE
16 years 6 days ago
Study of Variations of Native Program Execution Times on Multi-Core Architectures
Abstract—Program performance optimisations, feedbackdirected iterative compilation and auto-tuning systems [1] all assume a fixed estimation of execution time given a fixed inp...
Abdelhafid Mazouz, Sid Ahmed Ali Touati, Denis Bar...
ASPLOS
1998
ACM
15 years 11 months ago
Data Speculation Support for a Chip Multiprocessor
Thread-level speculation is a technique that enables parallel execution of sequential applications on a multiprocessor. This paper describes the complete implementation of the sup...
Lance Hammond, Mark Willey, Kunle Olukotun
NETWORK
2007
100views more  NETWORK 2007»
15 years 6 months ago
Parallel Programmable Ethernet Controllers: Performance and Security
Programmable network interfaces can provide network servers with a flexible interface to high-bandwidth Ethernet links, but they face critical software and architectural challenge...
Derek L. Schuff, Vijay S. Pai, Paul Willmann, Scot...
PE
2007
Springer
154views Optimization» more  PE 2007»
15 years 6 months ago
QoS management in service-oriented architectures
The next generation of software systems will be highly distributed, component-based and service-oriented. They will need to operate in unattended mode and possibly in hostile envi...
Daniel A. Menascé, Honglei Ruan, Hassan Gom...
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