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TVLSI
2008
133views more  TVLSI 2008»
15 years 6 months ago
A Medium-Grain Reconfigurable Architecture for DSP: VLSI Design, Benchmark Mapping, and Performance
Reconfigurable hardware has become a well-accepted option for implementing digital signal processing (DSP). Traditional devices such as field-programmable gate arrays offer good fi...
Mitchell J. Myjak, José G. Delgado-Frias
190
Voted
SENSYS
2010
ACM
15 years 4 months ago
Design and evaluation of a versatile and efficient receiver-initiated link layer for low-power wireless
We present A-MAC, a receiver-initiated link layer for low-power wireless networks that supports several services under a unified architecture, and does so more efficiently and sca...
Prabal Dutta, Stephen Dawson-Haggerty, Yin Chen, C...
POPL
2007
ACM
16 years 7 months ago
Manticore: a heterogeneous parallel language
The Manticore project is an effort to design and implement a new functional language for parallel programming. Unlike many earlier parallel languages, Manticore is a heterogeneous...
Matthew Fluet, Mike Rainey, John H. Reppy, Adam Sh...
CCECE
2006
IEEE
16 years 25 days ago
Reconfigurable Implementation of Wavelet Transform on an Fpga-Augmented NIOS Processor
The wavelet transform is a very popular tool in engineering for signal analysis. With respect to image compression, the new JPEG 2000 image standard incorporates wavelet transform...
Eugene Hyun, Mihai Sima, Michael McGuire
KES
2006
Springer
15 years 6 months ago
Implementation of a FIR Filter on a Partial Reconfigurable Platform
This paper presents our implemented, synthesized and tested on demand and partial reconfiguration approaches for FIR filters using Xilinx Virtex FPGAs. Our scope is to implement a ...
Hanho Lee, Chang-Seok Choi