Dataflow formalisms have provided designers of digital signal processing systems with optimizations and guarantees to arrive at quality prototypes quickly. As system complexity in...
William Plishker, Nimish Sane, Mary Kiemb, Kapil A...
In this paper we describe the design and implementation of a flexible, and extensible, just-in-time ARM simulator designed to run co-operatively with a multi-core DSP simulator on...
We argued in our Flexible Graphplan (FGP) work that the classical definition of the planning problem is too rigid to capture the full subtlety of many real problems. In light of t...
This paper presents the MRCP (Modular Routing Control Platform), a routing control architecture that provides complete control and visibility of interdomain routing in a single AS...
Multi-core CPUs, along with recent advances in memory and buses, render commodity hardware a strong candidate for software router virtualization. In this context, we present the d...
Norbert Egi, Adam Greenhalgh, Mark Handley, Micka&...