Sciweavers

127 search results - page 13 / 26
» Synthesis of Operation-Centric Hardware Descriptions
Sort
View
DATE
2006
IEEE
110views Hardware» more  DATE 2006»
16 years 17 hour ago
Top-down heterogeneous synthesis of analog and mixed-signal systems
A new approach for automated synthesis of analog and mixed-signal systems is presented. The heterogeneous genetic optimization strategy starts from a functional description and ev...
Ewout Martens, Georges G. E. Gielen
DATE
2003
IEEE
123views Hardware» more  DATE 2003»
15 years 11 months ago
XBM2PLA: A Flexible Synthesis Tool for Extended Burst Mode Machines
This paper describes the results of a new synthesis tool (XBM2PLA) for asynchronous state machines [2]. XBM2PLA generates the boolean functions for an asynchronous circuit. XBM2PL...
Oliver Kraus, Martin Padeffke
ISLPED
2009
ACM
125views Hardware» more  ISLPED 2009»
16 years 14 days ago
Behavior-level observability don't-cares and application to low-power behavioral synthesis
Many techniques for power management employed in advanced RTL synthesis tools rely explicitly or implicitly on observability don’t-care (ODC) conditions. In this paper we presen...
Jason Cong, Bin Liu, Zhiru Zhang
FPGA
2005
ACM
158views FPGA» more  FPGA 2005»
15 years 11 months ago
Automated synthesis for asynchronous FPGAs
We present an automatic logic synthesis method targeted for highperformance asynchronous FPGA (AFPGA) architectures. Our method transforms sequential programs as well as high-leve...
Song Peng, David Fang, John Teifel, Rajit Manohar
ACSD
2007
IEEE
103views Hardware» more  ACSD 2007»
16 years 9 days ago
Output-Determinacy and Asynchronous Circuit Synthesis
Signal Transition Graphs (STG) are a formalism for the description of asynchronous circuit behaviour. In this paper we propose (and justify) a formal semantics of nondeterministic...
Victor Khomenko, Mark Schäfer, Walter Vogler