651 search results - page 111 / 131 » Synchronization of periodic clocks |
144
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ASPDAC
2006
ACM
16 years 1 days ago
2006
ACM
— Process variations in digital circuits make sequential circuit timing validation an extremely challenging task. In this paper, a Statistical Bellman-Ford (SBF) algorithm is pro...
159
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ISCAS
2005
IEEE
15 years 11 months ago
2005
IEEE
— Multicycling is a widely investigated technique for performance optimisation in behavioural synthesis. It allows an operation to execute over two or more control steps with the...
157
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LCPC
2005
Springer
15 years 11 months ago
2005
Springer
With the increase of transistors integrated onto a chip, multi core processor architectures have attracted much attention to achieve high effective performance, shorten developmen...
158
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SAMOS
2004
Springer
15 years 11 months ago
2004
Springer
A high-performance data-path to implement DSP kernels is proposed in this paper. The data-path is based on a flexible, universal, and regular component to optimally exploiting both...
103
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ISCA
2003
IEEE
15 years 11 months ago
2003
IEEE
Clustered microarchitectures are an attractive alternative to large monolithic superscalar designs due to their potential for higher clock rates in the face of increasingly wire-d...