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169
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ISQED
2006
IEEE
90views Hardware» more  ISQED 2006»
16 years 20 days ago
Transaction Level Error Susceptibility Model for Bus Based SoC Architectures
System on Chip architectures have traditionally relied upon bus based interconnect for their communication needs. However, increasing bus frequencies and the load on the bus calls...
Ing-Chao Lin, Suresh Srinivasan, Narayanan Vijaykr...
ITNG
2006
IEEE
16 years 20 days ago
A Decentralized Network Coordinate System for Robust Internet Distance
Network distance, measured as round-trip latency between hosts, is important for the performance of many Internet applications. For example, nearest server selection and proximity...
Li-wei Lehman, Steven Lerman
215
Voted
LCN
2006
IEEE
16 years 20 days ago
Biologically-Inspired Adaptive Data Aggregation for Multi-Modal Wireless Sensor Networks
This paper describes BiSNET (Biologically-inspired architecture for Sensor NETworks), which addresses several key issues in multi-modal wireless sensor networks such as autonomy, ...
Pruet Boonma, Junichi Suzuki
RTCSA
2006
IEEE
16 years 20 days ago
Maximizing Guaranteed QoS in (m, k)-firm Real-time Systems
(m,k)-firm constraints have been used to schedule tasks in soft/firm real-time systems under overloaded conditions. In general, they are provided by application designers to guara...
Jian (Denny) Lin, Albert M. K. Cheng
168
Voted
SEFM
2006
IEEE
16 years 20 days ago
A PVS Based Framework for Validating Compiler Optimizations
An optimization can be specified as sequential compositions of predefined transformation primitives. For each primitive, we can define soundness conditions which guarantee that th...
Aditya Kanade, Amitabha Sanyal, Uday P. Khedker