199 search results - page 18 / 40 » Switching Activity Minimization in Combinational Logic Desig... |
153
click to vote
DAC
2005
ACM
16 years 6 months ago
2005
ACM
- The large magnitude of supply/ground bounces, which arise from power mode transitions in power gating structures, may cause spurious transitions in a circuit. This can result in ...
163
click to vote
DAC
2003
ACM
16 years 6 months ago
2003
ACM
A digital combinational logic circuit is reversible if it maps each input pattern to a unique output pattern. Such circuits are of interest in quantum computing, optical computing...
177
click to vote
INFOCOM
1998
IEEE
15 years 10 months ago
1998
IEEE
We consider the problem of constructing logical topologies over a wavelength-routed optical network with no wavelength changers. We present a general linear formulation which consi...
173
click to vote
DSN
2008
IEEE
15 years 7 months ago
2008
IEEE
The combination of continued technology scaling and increased on-chip transistor densities has made vulnerability to radiation induced soft errors a significant design concern. In...
148
click to vote
DATE
2010
IEEE
15 years 11 months ago
2010
IEEE
— The paper introduces novel field programmable gate array (FPGA) circuits based on hybrid CMOS/resistive switching device (memristor) technology and explores several logic archi...