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ISCA
2009
IEEE
189views Hardware» more  ISCA 2009»
16 years 1 months ago
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ra...
IMC
2009
ACM
16 years 1 months ago
One-click hosting services: a file-sharing hideout
File sharing using peer-to-peer (p2p) systems is a major Internet application and the leading source of network traffic today. However, the dominance of p2p systems for file sha...
Demetres Antoniades, Evangelos P. Markatos, Consta...
MICRO
2007
IEEE
115views Hardware» more  MICRO 2007»
16 years 25 days ago
Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0
A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
Naveen Muralimanohar, Rajeev Balasubramonian, Norm...
GECCO
2007
Springer
183views Optimization» more  GECCO 2007»
16 years 22 days ago
Screening the parameters affecting heuristic performance
This research screens the tuning parameters of a combinatorial optimization heuristic. Specifically, it presents a Design of Experiments (DOE) approach that uses a Fractional Fac...
Enda Ridge, Daniel Kudenko
GRID
2007
Springer
16 years 22 days ago
On the dynamic resource availability in grids
— Currently deployed grids gather together thousands of computational and storage resources for the benefit of a large community of scientists. However, the large scale, the wid...
Alexandru Iosup, Mathieu Jan, Omer Ozan Sonmez, Di...