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MEMOCODE
2003
IEEE
16 years 8 days ago
LOTOS Code Generation for Model Checking of STBus Based SoC: the STBus interconnect
In the design process of SoC (System on Chip), validation is one of the most critical and costly activity. The main problem for industrial companies like STMicroelectronics, stand...
Pierre Wodey, Geoffrey Camarroque, Fabrice Baray, ...
ISMIR
2003
Springer
133views Music» more  ISMIR 2003»
16 years 6 days ago
Chord segmentation and recognition using EM-trained hidden markov models
Automatic extraction of content description from commercial audio recordings has a number of important applications, from indexing and retrieval through to novel musicological ana...
Alexander Sheh, Daniel P. W. Ellis
EVOW
2001
Springer
15 years 11 months ago
ARPIA: A High-Level Evolutionary Test Signal Generator
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
PAKDD
1999
ACM
124views Data Mining» more  PAKDD 1999»
15 years 11 months ago
Discovery of Equations and the Shared Operational Semantics in Distributed Autonomous Databases
Empirical equations are an important class of regularities that can be discovered in databases. In this paper we concentrate on the role of equations as de nitions of attribute val...
Zbigniew W. Ras, Jan M. Zytkow
ECOOP
1998
Springer
15 years 11 months ago
Precise Visual Specification of Design Patterns
There has been substantial recent interest in captured design expertise expressed as design patterns. Prevalent descriptions of these design patterns suffer from two demerits. Firs...
Anthony Lauder, Stuart Kent