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DDECS
2009
IEEE
202views Hardware» more  DDECS 2009»
16 years 1 months ago
Asynchronous two-level logic of reduced cost
— We propose a novel synthesis method of a dual-rail asynchronous two-level logic of reduced cost. It is based on a model that operates under so called modified weak constraints....
Igor Lemberski, Petr Fiser
ICDM
2009
IEEE
139views Data Mining» more  ICDM 2009»
16 years 1 months ago
Towards Context Aware Food Sales Prediction
Sales prediction is a complex task because of large number of factors affecting the demand. We present a context aware sales prediction approach, which selects the base predictor ...
Indre Zliobaite, Jorn Bakker, Mykola Pechenizkiy
DSD
2008
IEEE
79views Hardware» more  DSD 2008»
16 years 1 months ago
Digital Systems Architectures Based on On-line Checkers
In this paper, a methodology for generating VHDL descriptions of hardware checkers is presented. It is shown how the methodology can be used to generate on-line checkers of commun...
Martin Straka, Zdenek Kotásek, Jan Winter
ICRA
2008
IEEE
170views Robotics» more  ICRA 2008»
16 years 1 months ago
Modeling and recognition of actions through motor primitives
— We investigate modeling and recognition of object manipulation actions for the purpose of imitation based learning in robotics. To model the process, we are using a combination...
David Martínez Mercado, Danica Kragic
ICSEA
2008
IEEE
16 years 1 months ago
A UML Based Methodology to Ease the Modeling of a Set of Related Systems
Despite progress in model engineering, modeling large distributed systems is still a long and complex task. This paper outlines a methodology based on UML to make the modeling of ...
Firas Alhalabi, Mathieu Maranzana, Jean-Louis Sour...