Sciweavers

5472 search results - page 753 / 1095
» Stochastic Mechanism Design
Sort
View
ISCA
2010
IEEE
284views Hardware» more  ISCA 2010»
15 years 12 months ago
Security refresh: prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address
Phase change memory (PCM) is an emerging memory technology for future computing systems. Compared to other non-volatile memory alternatives, PCM is more matured to production, and...
Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee
RTAS
1997
IEEE
15 years 11 months ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford
LNCS
1991
15 years 10 months ago
A Flexible Parser for a Linguistic Development Environment
We describe the parser of LEU/2, the Linguistic Experimentation Environment of the LILOG project. The parser is designed to support and encourage experimentation with different gr...
Gregor Erbach
CASES
2008
ACM
15 years 8 months ago
StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems
Although CMOS feature size scaling has been the source of dramatic performance gains, it has lead to mounting reliability concerns due to increasing power densities and on-chip te...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Jason ...
FASE
2008
Springer
15 years 8 months ago
Automated Analysis of Permission-Based Security Using UMLsec
Abstract. To guarantee the security of computer systems, it is necessary to define security permissions to restrict the access to the systems' resources. These permissions enf...
Jan Jürjens, Jörg Schreck, Yijun Yu