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IPPS
1999
IEEE
15 years 10 months ago
The Paderborn University BSP (PUB) Library - Design, Implementation and Performance
The Paderborn University BSP (PUB) library is a parallel C library based on the BSP model. The basic library supports buffered and unbuffered asynchronous communication between an...
Olaf Bonorden, Ben H. H. Juurlink, Ingo von Otte, ...
FPL
2010
Springer
155views Hardware» more  FPL 2010»
15 years 4 months ago
Design and Implementation of Real-Time Transactional Memory
Transactional memory is a promising, optimistic synchronization mechanism for chip-multiprocessor systems. The simplicity of atomic sections, instead of using explicit locks, is al...
Martin Schoeberl, Peter Hilber
ICUIMC
2011
ACM
14 years 10 months ago
A cross-layer design for resource allocation and congestion control in multichannel multi-hop cognitive radio networks
Efficient and fair resource allocation associated with congestion control in multi-hop cognitive radio networks (CRN) is a challenging problem. In this paper, we consider their mu...
Nguyen Van Mui, Choong Seon Hong
TGC
2007
Springer
16 years 18 days ago
Location-Aware Quality of Service Measurements for Service-Level Agreements
We add specifications of location-aware measurements to performance models in a compositional fashion, promoting precision in performance measurement design. Using immediate actio...
Ashok Argent-Katwala, Jeremy T. Bradley, Allan Cla...
DATE
2010
IEEE
168views Hardware» more  DATE 2010»
15 years 10 months ago
Formal verification of analog circuits in the presence of noise and process variation
We model and verify analog designs in the presence of noise and process variation using an automated theorem prover, MetiTarski. Due to the statistical nature of noise, we propose ...
Rajeev Narayanan, Behzad Akbarpour, Mohamed H. Zak...