2286 search results - page 154 / 458 » Statistical timing analysis based on a timing yield model |
167
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ISVLSI
2007
IEEE
16 years 23 days ago
2007
IEEE
As CMOS technology continues to scale, copper interconnect (CuI) will hinder the performance and reliability of Field Programmable Gate Arrays (FPGA) motivating the need for alter...
208
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MOBIQUITOUS
2007
IEEE
16 years 23 days ago
2007
IEEE
Client side caching of location dependent queries is an important technique for improving performance of location-based services. Most of the existing research in this area has fo...
180
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JPDC
2006
15 years 6 months ago
2006
Virtualization provides a vehicle to manage the available resources and enhance their utilization in network computing. System dynamics requires virtual machines be distributed an...
151
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ISQED
2003
IEEE
15 years 11 months ago
2003
IEEE
A structurally testable delay fault might become untestable in the functional mode of the circuit due to logic or timing constraints or both. Experimental data suggests that there...
140
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ISCAS
2006
IEEE
16 years 15 days ago
2006
IEEE
—With the development of IC technology, it becomes urgent to investigate model reduction method for interconnects with process variations. In this paper, a one-shot projection al...