This paper describes a compiler for stream programs that efficiently schedules computational kernels and stream memory operations, and allocates on-chip storage. Our compiler uses...
— In this paper, we present an enhanced adaptive frequency hopping (EAFH) mechanism for improving the performance of frequency hopping-based wireless personal area networks (WPAN...
Alex Chia-Chun Hsu, David S. L. Wei, C. C. Jay Kuo...
The Transaction Processing Performance Council (TPC) is completing development of TPC-DS, a new generation industry standard decision support benchmark. The TPC-DS benchmark, firs...
Federated simulation interfaces such as the High Level Architecture (HLA) were designed for interoperability, and as such are not traditionally associated with highperformance com...
Kalyan S. Perumalla, Alfred Park, Richard M. Fujim...
We present an algorithm designed for navigating around a performance that was filmed as a “casual” multi-view video collection: real-world footage captured on hand held camer...
Luca Ballan, Gabriel J. Brostow, Jens Puwein, Marc...