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» Stateful traits and their formalization
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ICCAD
2008
IEEE
125views Hardware» more  ICCAD 2008»
16 years 3 months ago
A succinct memory model for automated design debugging
— In today’s complex SoC designs, verification and debugging are becoming ever more crucial and increasingly timeconsuming tasks. The prevalence of embedded memories adds to t...
Brian Keng, Hratch Mangassarian, Andreas G. Veneri...
IDTRUST
2010
ACM
16 years 1 months ago
Computational techniques for increasing PKI policy comprehension by human analysts
Natural-language policies found in X.509 PKI describe an organization’s stated policy as a set of requirements for trust. The widespread use of X.509 underscores the importance ...
Gabriel A. Weaver, Scott A. Rea, Sean W. Smith
DATE
2009
IEEE
178views Hardware» more  DATE 2009»
16 years 1 months ago
Correct-by-construction generation of device drivers based on RTL testbenches
Abstract—The generation of device drivers is a very time consuming and error prone activity. All the strategies proposed up to now to simplify this operation require a manual, ev...
Nicola Bombieri, Franco Fummi, Graziano Pravadelli...
ATAL
2009
Springer
16 years 1 months ago
Agent programming with temporally extended goals
In planning as well as in other areas, temporal logic has been used to specify so-called temporally extended goals. Temporally extended goals refer to desirable sequences of state...
Koen V. Hindriks, Wiebe van der Hoek, M. Birna van...
ISCAS
2007
IEEE
96views Hardware» more  ISCAS 2007»
16 years 21 days ago
Modeling and Synthesis of Hardware-Software Morphing
— In state of the art hardware-software-co-design flows for FPGA based systems, the hardware-software partitioning problem is solved offline, thus, omitting the great flexibil...
Dirk Koch, Christian Haubelt, Thilo Streichert, J&...