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ICCAD
1996
IEEE
121views Hardware» more  ICCAD 1996»
15 years 11 months ago
Identification of unsettable flip-flops for partial scan and faster ATPG
State justification is a time-consuming operation in test generation for sequential circuits. In this paper, we present a technique to rapidly identify state elements (flip-flops)...
Ismed Hartanto, Vamsi Boppana, W. Kent Fuchs
ICCD
1996
IEEE
104views Hardware» more  ICCD 1996»
15 years 11 months ago
Latch Redundancy Removal Without Global Reset
For circuits where there may be latches with no reset line, we show how to replace some of them with combinational logic. All previous work in sequential optimization by latch rem...
Shaz Qadeer, Robert K. Brayton, Vigyan Singhal
CDC
2009
IEEE
173views Control Systems» more  CDC 2009»
15 years 10 months ago
Optimality of affine policies in multi-stage robust optimization
In this paper, we show the optimality of a certain class of disturbance-affine control policies in the context of one-dimensional, constrained, multi-stage robust optimization. Ou...
Dimitris Bertsimas, Dan Andrei Iancu, Pablo A. Par...
AUTOMATICA
2010
96views more  AUTOMATICA 2010»
15 years 6 months ago
Issues in sampling and estimating continuous-time models with stochastic disturbances
: The standard continuous time state space model with stochastic disturbances the mathematical abstraction of continuous time white noise. To work with well defined, discrete time ...
Lennart Ljung, Adrian Wills
CORR
2010
Springer
171views Education» more  CORR 2010»
15 years 6 months ago
Reliable Mining of Automatically Generated Test Cases from Software Requirements Specification (SRS)
Writing requirements is a two-way process. In this paper we use to classify Functional Requirements (FR) and Non Functional Requirements (NFR) statements from Software Requirement...
Lilly Raamesh, G. V. Uma