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» State machine models of timing and circuit design
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ISCAS
2005
IEEE
113views Hardware» more  ISCAS 2005»
15 years 11 months ago
On the robustness of an analog VLSI implementation of a time encoding machine
Abstract— Time encoding is a mechanism for representing the information contained in a continuous time, bandlimited, analog signal as the zero-crossings of a binary signal. Time ...
Peter R. Kinget, Aurel A. Lazar, Laszlo T. Toth
130
Voted
DAC
2005
ACM
16 years 7 months ago
Scalable trajectory methods for on-demand analog macromodel extraction
Trajectory methods sample the state trajectory of a circuit as it simulates in the time domain, and build macromodels by reducing and interpolating among the linearizations create...
Saurabh K. Tiwary, Rob A. Rutenbar
147
Voted
ICSE
2001
IEEE-ACM
15 years 10 months ago
State, Event, Time and Diagram in System Modeling
The design of complex systems requires powerful mechanisms for modeling state, concurrent events, and real-time behavior; as well as for visualising and structuring systems in ord...
Jin Song Dong
SPIRE
2001
Springer
15 years 10 months ago
Speed-up of Aho-Corasick Pattern Matching Machines by Rearranging States
Thispaper describes speed-up of string pattern matchingby rearrangingstates inAho-Corasickpattern matching machine, which is a kind of afinite automaton. Werealized speed-up of st...
T. Nishimura, Shuichi Fukamachi, Takeshi Shinohara
TCS
2010
15 years 4 months ago
Canonical finite state machines for distributed systems
There has been much interest in testing from finite state machines (FSMs) as a result of their suitability for modelling or specifying state-based systems. Where there are multip...
Robert M. Hierons