This paper presents an RTOS-centric hardwareisoftware cosimulator which we have developed for embedded system design. One of the most remarkable features in our cosimulator is tha...
This paper proposes a novel Deadlock Avoidance Algorithm (DAA) and its hardware implementation, the Deadlock Avoidance Unit (DAU), as an Intellectual Property (IP) core that provi...
The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting special hardware features. Due to the irregular arc...
This paper explores hardware-implemented error-detection and security mechanisms embedded as modules in a hardware-level framework called the Reliability and Security Engine (RSE)...
Nithin Nakka, Zbigniew Kalbarczyk, Ravishankar K. ...
Skyline queries compute the set of Pareto-optimal tuples in a relation, i.e., those tuples that are not dominated by any other tuple in the same relation. Although several algorit...