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VEE
2009
ACM
246views Virtualization» more  VEE 2009»
16 years 1 months ago
Tracing for web 3.0: trace compilation for the next generation web applications
Today’s web applications are pushing the limits of modern web browsers. The emergence of the browser as the platform of choice for rich client-side applications has shifted the ...
Mason Chang, Edwin W. Smith, Rick Reitmaier, Micha...
IEEEPACT
2006
IEEE
16 years 1 months ago
Compiling for stream processing
This paper describes a compiler for stream programs that efficiently schedules computational kernels and stream memory operations, and allocates on-chip storage. Our compiler uses...
Abhishek Das, William J. Dally, Peter R. Mattson
MICRO
2006
IEEE
84views Hardware» more  MICRO 2006»
16 years 1 months ago
Reunion: Complexity-Effective Multicore Redundancy
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
Jared C. Smolens, Brian T. Gold, Babak Falsafi, Ja...
CGO
2005
IEEE
16 years 20 days ago
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh ...
ECRTS
2005
IEEE
16 years 20 days ago
Cache Contents Selection for Statically-Locked Instruction Caches: An Algorithm Comparison
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
Antonio Martí Campoy, Isabelle Puaut, Angel...