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186
Voted
HICSS
1995
IEEE
15 years 10 months ago
1995
IEEE
The architecture for a shared memory CPU is described. The CPU allows for parallelism down to the level of single instructions and is tolerant of memory latency. All executable in...
192
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ICCD
1995
IEEE
15 years 10 months ago
1995
IEEE
– This paper describes a new technique for extracting clock-level finite state machines(FSMs) from transistor netlists using symbolic simulation. The transistor netlist is prepr...
192
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DEXA
2008
Springer
15 years 8 months ago
2008
Springer
Information filtering systems constitute a critical component in modern information seeking applications. As the number of users grows and the information available becomes even bi...
173
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CCCG
2010
15 years 8 months ago
2010
We present a data structure for efficient axis-aligned orthogonal range search on a set of n lines in a bounded plane. The algorithm requires O(log n + k) time in the worst case t...
185
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CCCG
2008
15 years 8 months ago
2008
Given a set of n points P = {p1, p2, . . . , pn} in the plane, we show how to preprocess P such that for any query line segment L we can report in O(log n) time the smallest enclo...