Classical sampling records the signal level at pre-determined time instances, usually uniformly spaced. An alternative implicit sampling model is to record the timing of pre-deter...
With growing capacities of flash memories, an efficient layer to manage read and write access to flash is required. NFTL is a widely used block based flash translation layer de...
Abstract—The high-level synthesis process allows the automatic design and implementation of digital circuits starting from a behavioral description. Evolutionary algorithms are v...
Christian Pilato, Gianluca Palermo, Antonino Tumeo...
This paper addresses the problem of generating conflict-free periodic train timetables for large railway networks. We follow a two level approach, where a simplified track topolo...
Gabrio Curzio Caimi, Martin Fuchsberger, Marco Lau...