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VLSID
2003
IEEE
183views VLSI» more  VLSID 2003»
16 years 6 months ago
Interconnect Delay Minimization Using a Novel Pre-Mid-Post Buffer Strategy
We consider the problem of minimizing the delay in transporting a signal across a distance in a VLSI circuit.The problem can be restated as a combined buffer insertion, buffer siz...
Vani Prasad, Madhav P. Desai
DAC
2000
ACM
16 years 7 months ago
The use of carry-save representation in joint module selection and retiming
Joint module selection and retiming is a powerful technique to optimize the implementation cost and the speed of a circuit specified using a synchronous data-flow graph (DFG). In ...
Zhan Yu, Kei-Yong Khoo, Alan N. Willson Jr.
AMAI
2000
Springer
15 years 10 months ago
On Solving Boolean Optimization with Satisfiability-Based Algorithms
This paper proposes new algorithms for the Binate Covering Problem (BCP), a well-known restriction of Boolean Optimization. Binate Covering finds application in many areas of Comp...
Vasco M. Manquinho, João P. Marques Silva
KCAP
2009
ACM
16 years 25 days ago
Workflow matching using semantic metadata
Workflows are becoming an increasingly more common paradigm to manage scientific analyses. As workflow repositories start to emerge, workflow retrieval and discovery becomes a cha...
Yolanda Gil, Jihie Kim, Gonzalo Flórez Puga...
AISB
1995
Springer
15 years 10 months ago
Specialised Recombinative Operators for Timetabling Problems
This paper discusses a series of recombination operators for the timetabling problem. These operators act upon a direct representation of the timetable and maintain the property of...
Edmund K. Burke, Dave Elliman, Rupert F. Weare