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HPCA
2000
IEEE
15 years 11 months ago
Improving the Throughput of Synchronization by Insertion of Delays
Efficiency of synchronization mechanisms can limit the parallel performance of many shared-memory applications. In addition, the ever increasing performance gap between processor...
Ravi Rajwar, Alain Kägi, James R. Goodman
SIGSOFT
2010
ACM
15 years 4 months ago
Staged concurrent program analysis
Concurrent program verification is challenging because it involves exploring a large number of possible thread interleavings together with complex sequential reasoning. As a resul...
Nishant Sinha, Chao Wang
ISCA
2011
IEEE
225views Hardware» more  ISCA 2011»
14 years 10 months ago
FlexBulk: intelligently forming atomic blocks in blocked-execution multiprocessors to minimize squashes
Blocked-execution multiprocessor architectures continuously run atomic blocks of instructions — also called Chunks. Such architectures can boost both performance and software pr...
Rishi Agarwal, Josep Torrellas
CODES
2011
IEEE
14 years 6 months ago
SoC-TM: integrated HW/SW support for transactional memory programming on embedded MPSoCs
Two overriding concerns in the development of embedded MPSoCs are ease of programming and hardware complexity. In this paper we present SoC-TM, an integrated HW/SW solution for tr...
Cesare Ferri, Andrea Marongiu, Benjamin Lipton, R....
DSD
2011
IEEE
194views Hardware» more  DSD 2011»
14 years 6 months ago
Reliability-Aware Design Optimization for Multiprocessor Embedded Systems
—This paper presents an approach for the reliability-aware design optimization of real-time systems on multi-processor platforms. The optimization is based on an extension of wel...
Jia Huang, Jan Olaf Blech, Andreas Raabe, Christia...