1199 search results - page 140 / 240 » Software Verification and Software Engineering a Practitione... |
166
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IOLTS
2008
IEEE
16 years 16 days ago
2008
IEEE
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient err...
149
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ICSE
2001
IEEE-ACM
15 years 10 months ago
2001
IEEE-ACM
It has long been accepted that requirements analysis should precede architectural design and implementation, but in software evolution and reverse engineering this concern with bl...
205
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SOFTVIS
2010
ACM
15 years 6 months ago
2010
ACM
Multi-core processors have become increasingly prevalent, driving a software shift toward concurrent programs which best utilize these processors. Testing and debugging concurrent...
196
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ICST
2009
IEEE
15 years 3 months ago
2009
IEEE
Bounded model checking--as well as symbolic equivalence checking--are highly successful techniques in the hardware domain. Recently, bit-vector bounded model checkers like CBMC ha...
179
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SAC
2010
ACM
15 years 4 months ago
2010
ACM
Verification conditions (VCs) are logical formulae whose validity implies the correctness of a program with respect to a specification. The technique of checking software properti...