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IEEEPACT
2005
IEEE
15 years 11 months ago
Communication Optimizations for Fine-Grained UPC Applications
Global address space languages like UPC exhibit high performance and portability on a broad class of shared and distributed memory parallel architectures. The most scalable applic...
Wei-Yu Chen, Costin Iancu, Katherine A. Yelick
CODES
2000
IEEE
15 years 10 months ago
Memory architecture for efficient utilization of SDRAM: a case study of the computation/memory access trade-off
This paper discusses the trade-off between calculations and memory accesses in a 3D graphics tile renderer for visualization of data from medical scanners. The performance require...
Thomas Gleerup, Hans Holten-Lund, Jan Madsen, Stee...
ISPASS
2005
IEEE
15 years 11 months ago
Accelerating Multiprocessor Simulation with a Memory Timestamp Record
We introduce a fast and accurate technique for initializing the directory and cache state of a multiprocessor system based on a novel software structure called the memory timestam...
Kenneth C. Barr, Heidi Pan, Michael Zhang, Krste A...
IWOMP
2007
Springer
16 years 3 days ago
Parallel Data Flow Analysis for OpenMP Programs
The paper presents a compiler framework for analyzing and optimizing OpenMP programs. The framework includes Parallel Control Flow Graph and Parallel Data Flow equations based on t...
Lei Huang, Girija Sethuraman, Barbara M. Chapman
SBMF
2009
Springer
184views Formal Methods» more  SBMF 2009»
16 years 15 days ago
Concolic Testing of the Multi-sector Read Operation for Flash Memory File System
In today’s information society, flash memory has become a virtually indispensable component, particularly for mobile devices. In order for mobile devices to operate successfully...
Moonzoo Kim, Yunho Kim