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JUCS
2010
107views more  JUCS 2010»
15 years 5 months ago
Systematic Unit Testing in a Read-eval-print Loop
: Lisp programmers constantly carry out experiments in a read-eval-print loop. The experimental activities convince the Lisp programmers that new or modified pieces of programs wo...
Kurt Nørmark
VLSID
2009
IEEE
115views VLSI» more  VLSID 2009»
16 years 7 months ago
Efficient Techniques for Directed Test Generation Using Incremental Satisfiability
Functional validation is a major bottleneck in the current SOC design methodology. While specification-based validation techniques have proposed several promising ideas, the time ...
Prabhat Mishra, Mingsong Chen
GLVLSI
2007
IEEE
189views VLSI» more  GLVLSI 2007»
16 years 27 days ago
Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...
Paolo Bernardi, Michelangelo Grosso, Matteo Sonza ...
ESE
2006
95views Database» more  ESE 2006»
15 years 6 months ago
Input validation analysis and testing
This research addresses the problem of statically analyzing input command syntax as defined in interface and requirements specifications and then generating test cases for dynamic ...
Jane Huffman Hayes, Jeff Offutt
ASPLOS
2012
ACM
14 years 2 months ago
Path-exploration lifting: hi-fi tests for lo-fi emulators
Processor emulators are widely used to provide isolation and instrumentation of binary software. However they have proved difficult to implement correctly: processor specificati...
Lorenzo Martignoni, Stephen McCamant, Pongsin Poos...