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ISCA
1999
IEEE
187views Hardware» more  ISCA 1999»
15 years 10 months ago
Area Efficient Architectures for Information Integrity in Cache Memories
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
Seongwoo Kim, Arun K. Somani
SOFTWARE
2002
15 years 6 months ago
Modeling with a Sense of Purpose
is the level of abstraction: a logical model ignores the constraints that the underlying database technology imposes and presents a simplified view. Sometimes physical database des...
John Daniels
POPL
2005
ACM
16 years 6 months ago
Synthesis of interface specifications for Java classes
While a typical software component has a clearly specified (static) interface in terms of the methods and the input/output types they support, information about the correct sequen...
P. Madhusudan, Pavol Cerný, Rajeev Alur, Wo...
FORTE
2004
15 years 7 months ago
Localizing Program Errors for Cimple Debugging
Abstract. We present automated techniques for the explanation of counterexamples, where a counter-example should be understood as a sequence of program statements. Our approach is ...
Samik Basu, Diptikalyan Saha, Scott A. Smolka
FOSSACS
2001
Springer
15 years 11 months ago
On Regular Message Sequence Chart Languages and Relationships to Mazurkiewicz Trace Theory
Hierarchical Message Sequence Charts are a well-established formalism to specify telecommunication protocols. In this model, numerous undecidability results were obtained recently ...
Rémi Morin