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SBCCI
2003
ACM
115views VLSI» more  SBCCI 2003»
16 years 9 hour ago
Combining Retiming and Recycling to Optimize the Performance of Synchronous Circuits
Recycling was recently proposed as a system-level design technique to facilitate the building of complex System-on-Chips (SOC) by assembling pre-designed components. Recycling all...
Luca P. Carloni, Alberto L. Sangiovanni-Vincentell...
HUC
2003
Springer
15 years 12 months ago
"Playing with the Bits" User-Configuration of Ubiquitous Domestic Environments
This paper presents the development of a user-oriented framework to support the user reconfiguration of ubiquitous domestic environments. We present a lightweight component model t...
Jan Humble, Andy Crabtree, Terry Hemmings, Karl-Pe...
WG
2001
Springer
15 years 11 months ago
(k, +)-Distance-Hereditary Graphs
In this work we introduce, characterize, and provide algorithmic results for (k, +)–distance-hereditary graphs, k ≥ 0. These graphs can be used to model interconnection networ...
Serafino Cicerone, Gianluca D'Ermiliis, Gabriele D...
ISPD
1999
ACM
106views Hardware» more  ISPD 1999»
15 years 11 months ago
Timing driven maze routing
—This paper studies a natural formulation of the timing-driven maze routing problem. A multigraph model appropriate for global routing applications is adopted; the model naturall...
Sung-Woo Hur, Ashok Jagannathan, John Lillis
IPPS
1998
IEEE
15 years 11 months ago
Self-Testing Fault-Tolerant Real-Time Systems
We propose a periodic diagnostic algorithm based on the testing model of computation for real-time systems. The diagnostic task runs on every processor of the system. When the task...
M. Rooholamini, Seyed H. Hosseini