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GLVLSI
2003
IEEE
134views VLSI» more  GLVLSI 2003»
15 years 12 months ago
Modeling QCA for area minimization in logic synthesis
Concerned by the wall that Moore’s Law is expected to hit in the next decade, the integrated circuit community is turning to emerging nanotechnologies for continued device impro...
Nadine Gergel, Shana Craft, John Lach
GLVLSI
2008
IEEE
129views VLSI» more  GLVLSI 2008»
16 years 1 months ago
Variational capacitance modeling using orthogonal polynomial method
In this paper, we propose a novel statistical capacitance extraction method for interconnects considering process variations. The new method, called statCap, is based on the spect...
Jian Cui, Gengsheng Chen, Ruijing Shen, Sheldon X....
DAC
1998
ACM
16 years 7 months ago
Performance Driven Multi-Layer General Area Routing for PCB/MCM Designs
In this paper we present a new global router appropriate for Multichip Module MCM and dense Printed Circuit Board PCB design, which utilizes a hybrid of the classical rip-up and r...
Jason Cong, Patrick H. Madden
ENTCS
2006
168views more  ENTCS 2006»
15 years 6 months ago
A Functional Programming Framework for Latency Insensitive Protocol Validation
Latency insensitive protocols (LIPs) have been proposed as a viable means to connect synchronous IP blocks via long interconnects in a system-on-chip. The reason why one needs to ...
Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla...
MODELS
2007
Springer
16 years 21 days ago
A UML Profile for Developing Airworthiness-Compliant (RTCA DO-178B), Safety-Critical Software
Many safety-related and certification standards exist for developing safety-critical systems. Safety assessments are performed in practice, and system certification according to a...
Gregory Zoughbi, Lionel C. Briand, Yvan Labiche