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GLVLSI
2007
IEEE
189views VLSI» more  GLVLSI 2007»
16 years 10 days ago
Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...
Paolo Bernardi, Michelangelo Grosso, Matteo Sonza ...
ISCA
2010
IEEE
219views Hardware» more  ISCA 2010»
15 years 11 months ago
Using hardware vulnerability factors to enhance AVF analysis
Fault tolerance is now a primary design constraint for all major microprocessors. One step in determining a processor’s compliance to its failure rate target is measuring the Ar...
Vilas Sridharan, David R. Kaeli
FPL
2009
Springer
149views Hardware» more  FPL 2009»
15 years 10 months ago
Reconfigurable fault tolerance: A framework for environmentally adaptive fault mitigation in space
Commercial SRAM-based FPGAs have the potential to provide aerospace applications with the necessary performance to meet next-generation mission requirements. However, the suscepti...
Adam Jacobs, Alan D. George, Grzegorz Cieslewski
ICPADS
1994
IEEE
15 years 10 months ago
Efficient Fault Tolerance: An Approach to Deal with Transient Faults in Multiprocessor Architectures
Dynamic error processing approaches are an important mechanism to increase the reliability in a multiprocessor system, while making efficient use of the available resources. To th...
Andrea Bondavalli, Silvano Chiaradonna, Felicita D...
IPPS
2007
IEEE
16 years 9 days ago
A Fault Tolerance Protocol with Fast Fault Recovery
Fault tolerance is an important issue for large machines with tens or hundreds of thousands of processors. Checkpoint-based methods, currently used on most machines, rollback all ...
Sayantan Chakravorty, Laxmikant V. Kalé