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DAC
2005
ACM
16 years 7 months ago
Fault and energy-aware communication mapping with guaranteed latency for applications implemented on NoC
As feature sizes shrink, transient failures of on-chip network links become a critical problem. At the same time, many applications require guarantees on both message arrival prob...
Sorin Manolache, Petru Eles, Zebo Peng
ISORC
2003
IEEE
15 years 12 months ago
Integrating COTS Software Components into Dependable Software Architectures
sents some concluding remarks and discusses future work. This paper considers the problem of integrating commercial off-the-shelf (COTS) software components into systems with high ...
Paulo Asterio de Castro Guerra, Alexander B. Roman...
AI
2002
Springer
15 years 6 months ago
On the relationship between model-based debugging and program slicing
Program slicing is a general, widely-used, and accepted technique applicable to different software engineering tasks including debugging, whereas model-based diagnosis is an AI te...
Franz Wotawa
DSD
2008
IEEE
79views Hardware» more  DSD 2008»
16 years 1 months ago
Digital Systems Architectures Based on On-line Checkers
In this paper, a methodology for generating VHDL descriptions of hardware checkers is presented. It is shown how the methodology can be used to generate on-line checkers of commun...
Martin Straka, Zdenek Kotásek, Jan Winter
EH
2005
IEEE
119views Hardware» more  EH 2005»
16 years 5 days ago
Survivability of Embryonic Memories: Analysis and Design Principles
This paper proposes an original approach to the reliability analysis for Embryonics [4], by introducing the accuracy threshold measure, borrowed from fault-tolerant quantum comput...
Lucian Prodan, Mihai Udrescu, Mircea Vladutiu