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MICRO
2005
IEEE
145views Hardware» more  MICRO 2005»
16 years 2 days ago
A Mechanism for Online Diagnosis of Hard Faults in Microprocessors
We develop a microprocessor design that tolerates hard faults, including fabrication defects and in-field faults, by leveraging existing microprocessor redundancy. To do this, we...
Fred A. Bower, Daniel J. Sorin, Sule Ozev
CAMP
2005
IEEE
16 years 3 days ago
Bio-Inspired Computing Architectures: The Embryonics Approach
Abstract— The promise of next-generation computer technologies, such as nano-electronics, implies a number of serious alterations to the design flow of digital circuits. One of ...
Gianluca Tempesti, Daniel Mange, André Stau...
DATE
2005
IEEE
128views Hardware» more  DATE 2005»
16 years 3 days ago
On the Optimal Design of Triple Modular Redundancy Logic for SRAM-based FPGAs
Triple Modular Redundancy (TMR) is a suitable fault tolerant technique for SRAM-based FPGA. However, one of the main challenges in achieving 100% robustness in designs protected b...
Fernanda Lima Kastensmidt, Luca Sterpone, Luigi Ca...
SSS
2005
Springer
119views Control Systems» more  SSS 2005»
15 years 12 months ago
Self-stabilization of Byzantine Protocols
Awareness of the need for robustness in distributed systems increases as distributed systems become integral parts of day-to-day systems. Self-stabilizing while tolerating ongoing ...
Ariel Daliot, Danny Dolev
IOLTS
2008
IEEE
116views Hardware» more  IOLTS 2008»
16 years 27 days ago
SystemC-Based Minimum Intrusive Fault Injection Technique with Improved Fault Representation
In this paper, we propose a new SystemC-based fault injection technique that has improved fault representation in visible and on-the-fly data and signal registers. The technique ...
Rishad A. Shafik, Paul M. Rosinger, Bashir M. Al-H...