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SARA
2009
Springer
16 years 1 months ago
Automated Redesign with the General Redesign Engine
: Given a system design (SD), a key task is to optimize this design to reduce the probability of catastrophic failures. We consider the task of redesigning an SD to minimize the pr...
Alexander Feldman, Gregory M. Provan, Johan de Kle...
ICPPW
2009
IEEE
15 years 4 months ago
Analyzing Checkpointing Trends for Applications on the IBM Blue Gene/P System
Current petascale systems have tens of thousands of hardware components and complex system software stacks, which increase the probability of faults occurring during the lifetime ...
Harish Gapanati Naik, Rinku Gupta, Pete Beckman
VLSID
2006
IEEE
128views VLSI» more  VLSID 2006»
16 years 6 months ago
Custom Reconfigurable Architecture for Autonomous Fault-Recovery of MEMS Vibratory Sensor Electronics
This paper presents a novel custom-reconfigurable architecture, which is tailored to accomplish the electronic circuits associated with MEMS vibratory sensors. The paradigm of thi...
Evangelos F. Stefatos, Tughrul Arslan, Didier Keym...
QSIC
2005
IEEE
16 years 1 days ago
Formal Fault Tree Analysis of State Transition Systems
Fault Tree Analysis (FTA) is a traditional deductive safety analysis technique that is applied during the system design stage. However, traditional FTA does not consider transitio...
Jianwen Xiang, Kazuhiro Ogata
PDP
2010
IEEE
15 years 4 months ago
Investigation of Transient Fault Effects in an Asynchronous NoC Router
— This paper presents Investigation of Transient Fault Effects in an asynchronous NoC router. The experiment is based on simulation-based fault injection method to assess the fau...
Pooria M. Yaghini, Ashkan Eghbal, Hossein Pedram, ...