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HOTI
2005
IEEE
16 years 15 days ago
Hybrid Cache Architecture for High Speed Packet Processing
: The exposed memory hierarchies employed in many network processors (NPs) are expensive in terms of meeting the worst-case processing requirement. Moreover, it is difficult to ef...
Zhen Liu, Kai Zheng, Bin Liu
EMSOFT
2004
Springer
16 years 8 days ago
Heterogeneous reactive systems modeling: capturing causality and the correctness of loosely time-triggered architectures (LTTA)
We present an extension of a mathematical framework proposed by the authors to deal with the composition of heterogeneous reactive systems. Our extended framework encompasses dive...
Albert Benveniste, Benoît Caillaud, Luca P. ...
LCPC
2004
Springer
16 years 7 days ago
Branch Strategies to Optimize Decision Trees for Wide-Issue Architectures
Abstract. Branch predictors are associated with critical design issues for nowadays instruction greedy processors. We study two important domains where the optimization of decision...
Patrick Carribault, Christophe Lemuet, Jean-Thomas...
ISPDC
2003
IEEE
16 years 5 days ago
Lightweight Logging and Recovery for Distributed Shared Memory over Virtual Interface Architecture
As software Distributed Shared Memory(DSM) systems become attractive on larger clusters, the focus of attention moves toward improving the reliability of systems. In this paper, w...
Soyeon Park, Youngjae Kim, Seung Ryoul Maeng
RSP
2003
IEEE
130views Control Systems» more  RSP 2003»
16 years 5 days ago
Contributions to middleware architectures to prototype distribution infrastructures
— Distributed applications require specific middleware support for semantics and run-time constraints for a wide range of hardware or software configurations. However, their fu...
Jérôme Hugues, Laurent Pautet, Fabric...