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213
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ISCA
1999
IEEE
187views Hardware» more  ISCA 1999»
15 years 11 months ago
Area Efficient Architectures for Information Integrity in Cache Memories
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
Seongwoo Kim, Arun K. Somani
197
Voted
NGITS
1993
Springer
15 years 11 months ago
AMOS - An Architecture for Active Mediators
AMOS (Active Mediators Object System) is an architecture to model, locate, search, combine, update, and monitor data in information systems with many work stations connected using...
Gustav Fahl, Tore Risch, Martin Sköld
208
Voted
DAC
2009
ACM
15 years 10 months ago
NUDA: a non-uniform debugging architecture and non-intrusive race detection for many-core
Traditional debug methodologies are limited in their ability to provide debugging support for many-core parallel programming. Synchronization problems or bugs due to race conditio...
Chi-Neng Wen, Shu-Hsuan Chou, Tien-Fu Chen, Alan P...
198
Voted
CCGRID
2006
IEEE
15 years 10 months ago
Building Cyberinfrastructure for Bioinformatics Using Service Oriented Architecture
-- Cyberinfrastructure makes the development and deployment of bioinformatics applications easier by providing the framework and components that may be loosely coupled using servic...
Wilfred W. Li, Sriram Krishnan, Kurt Mueller, Kohe...
181
Voted
WSC
1998
15 years 8 months ago
The DoD High Level Architecture: an update
The High Level Architecture (HLA) provides the specification of a common technical architecture for use across all classes of simulations in the US Department of Defense. It provi...
Judith S. Dahmann, Richard Fujimoto, Richard M. We...