—With increasing numbers of cores, future CMPs (Chip Multi-Processors) are likely to have a tiled architecture with a portion of shared L2 cache on each tile and a bankinterleave...
This paper introduces and summarizes a comprehensive systems approach guiding an ongoing project addressing these significant challenges confronting logistics transformation. Curr...
The RISA Architecture is a novel reconfigurable hardware platform containing both hardware and software reconfigurable elements. This paper describes the architecture and the fea...
To demonstrate the flexibility and portability of both a schema-based software architecture and a message-passing hardware architecture, the two were integrated within a very shor...
Thomas R. Collins, Ronald C. Arkin, Andrew M. Hens...
In this paper, we propose a new methodology to integrate circuit transformation into routing. More specifically, this paper shows an approach for performing routing and wire recon...