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IEEEPACT
2009
IEEE
16 years 1 months ago
Data Layout Transformation for Enhancing Data Locality on NUCA Chip Multiprocessors
—With increasing numbers of cores, future CMPs (Chip Multi-Processors) are likely to have a tiled architecture with a portion of shared L2 cache on each tile and a bankinterleave...
Qingda Lu, Christophe Alias, Uday Bondhugula, Thom...
WSC
2004
15 years 8 months ago
Enabling a Transforming Army at War: Analysis to Improve Logistics Network Efficiency and Effectiveness
This paper introduces and summarizes a comprehensive systems approach guiding an ongoing project addressing these significant challenges confronting logistics transformation. Curr...
Greg H. Parlier
ICES
2007
Springer
83views Hardware» more  ICES 2007»
16 years 25 days ago
Extrinsic Evolvable Hardware on the RISA Architecture
The RISA Architecture is a novel reconfigurable hardware platform containing both hardware and software reconfigurable elements. This paper describes the architecture and the fea...
Andrew J. Greensted, Andrew M. Tyrrell
153
Voted
ICRA
1993
IEEE
99views Robotics» more  ICRA 1993»
15 years 10 months ago
Integration of Reactive Navigation with a flexible Parallel Hardware Architecture
To demonstrate the flexibility and portability of both a schema-based software architecture and a message-passing hardware architecture, the two were integrated within a very shor...
Thomas R. Collins, Ronald C. Arkin, Andrew M. Hens...
VLSID
2002
IEEE
87views VLSI» more  VLSID 2002»
16 years 7 months ago
Simultaneous Circuit Transformation and Routing
In this paper, we propose a new methodology to integrate circuit transformation into routing. More specifically, this paper shows an approach for performing routing and wire recon...
Hiroaki Yoshida, Motohiro Sera, Masao Kubo, Masahi...