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ICIP
2003
IEEE
16 years 8 months ago
Parallel-pipelined architecture for 2-D ICT VLSI implementation
The Integer Cosine Transform (ICT) has been shown to be an alternative to the DCT for image processing. This paper presents a parallel-pipelined architecture of an 8x8 ICT(10, 9, ...
Juan A. Michell, Gustavo A. Ruiz, Angel M. Buron
SAFECOMP
2005
Springer
16 years 4 days ago
Problem Frames and Architectures for Security Problems
Abstract. We present several problem frames that serve to structure, characterize and analyze software development problems in the area of software and system security. These probl...
Denis Hatebur, Maritta Heisel
ISADS
2003
IEEE
15 years 12 months ago
The Central Guardian Approach to Enforce Fault Isolation in the Time-Triggered Architecture
This paper discusses measures to make a distributed system based on the Time-Triggered Architecture resistant to arbitrary node failures. To achieve this, the presented approach i...
Günther Bauer, Hermann Kopetz, Wilfried Stein...
VLSISP
2008
111views more  VLSISP 2008»
15 years 6 months ago
Design Methodology for Throughput Optimum Architectures of Hash Algorithms of the MD4-class
Abstract. In this paper we propose an architecture design methodology to optimize the throughput of MD4-based hash algorithms. The proposed methodology includes an iteration bound ...
Yong Ki Lee, Herwin Chan, Ingrid Verbauwhede
VLSID
2010
IEEE
190views VLSI» more  VLSID 2010»
15 years 4 months ago
A Reconfigurable Architecture for Secure Multimedia Delivery
This paper introduces a reconfigurable architecture for ensuring secure and real-time video delivery through a novel parameterized construction of the Discrete Wavelet Transform (D...
Amit Pande, Joseph Zambreno