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ISCA
2000
IEEE
107views Hardware» more  ISCA 2000»
15 years 10 months ago
A fully associative software-managed cache design
As DRAM access latencies approach a thousand instructionexecution times and on-chip caches grow to multiple megabytes, it is not clear that conventional cache structures continue ...
Erik G. Hallnor, Steven K. Reinhardt
SIGUCCS
2000
ACM
15 years 10 months ago
Three Years in the Solution Center
After thirty-plus years of making small “mid-course corrections” types of changes to the support paradigm, many on the Iowa State University campus thought it was time to make...
Frank Poduska
DDEP
2000
Springer
15 years 10 months ago
Perceptually-Tuned Grayscale Characters Based on Parametrisable Component Fonts
Abstract. Our component-based parametrisable font system is a newly developed font description and reproduction technology. It incorporates for each basic character shape a softwar...
Changyuan Hu, Roger D. Hersch
DAC
1999
ACM
15 years 10 months ago
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...
Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar...
ICPADS
1998
IEEE
15 years 10 months ago
User-Defined Telecooperation Services
A user-defined telecooperation service (UTS) provides service elements for application-specific communication and cooperation processes as well as integrated means for the service...
Volker Gruhn, Peter Herrmann, Heiko Krumm
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