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FPGA
2008
ACM
133views FPGA» more  FPGA 2008»
15 years 8 months ago
Vector processing as a soft-core CPU accelerator
The currently accepted method of accelerating applications in FPGA soft processor systems is to design a custom hardware accelerator. This paper suggests the alternative approach ...
Jason Yu, Guy Lemieux, Christopher Eagleston
FPL
2008
Springer
138views Hardware» more  FPL 2008»
15 years 8 months ago
An efficient run-time router for connecting modules in FPGAS
It is often desirable to change the logic and/or the connections within an FPGA design on-the-fly without the benefit of a workstation or vendor CAD software. This paper presents ...
Jorge Surís, Cameron Patterson, Peter Athan...
182
Voted
ALENEX
2007
126views Algorithms» more  ALENEX 2007»
15 years 8 months ago
0/1 Vertex and Facet Enumeration with BDDs
In polyhedral studies of 0/1 polytopes two prominent problems exist. One is the vertex enumeration problem: Given a system of inequalities, enumerate its feasible 0/1 points. Anot...
Markus Behle, Friedrich Eisenbrand
CASCON
2007
104views Education» more  CASCON 2007»
15 years 8 months ago
Identifying fault-prone files using static analysis alerts through singular value decomposition
Static analysis tools tend to generate more alerts than a development team can reasonably examine without some form of guidance. In this paper, we propose a technique for leveragi...
Mark Sherriff, Sarah Smith Heckman, Mike Lake, Lau...
160
Voted
FOIS
2010
15 years 8 months ago
Ontologies for Distributed Command and Control Messaging
This paper presents the development of a set of ontologies for use in messaging systems within military and emergency first responder command and control applications. These ontolo...
Duc N. Nguyen, Joseph B. Kopena, Boon Thau Loo, Wi...
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