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» Software, architecture, and participatory design
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ISSS
1997
IEEE
83views Hardware» more  ISSS 1997»
15 years 11 months ago
A Scheduling and Pipelining Algorithm for Hardware/Software Systems
Given a hardware/software partitioned specification and an allocation (number and type) of processors, we present an algorithm to (1) map each of the software behaviors (or tasks...
Smita Bakshi, Daniel Gajski
HPCA
1996
IEEE
15 years 11 months ago
Co-Scheduling Hardware and Software Pipelines
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded process...
Ramaswamy Govindarajan, Erik R. Altman, Guang R. G...
HICSS
2005
IEEE
143views Biometrics» more  HICSS 2005»
16 years 13 days ago
Strategic Versus Tactical Design
Abstract. We seek to distinguish Strategic design decisions (e.g., to adopt a programming paradigm, architectural style, CBSE standard or application framework) from tactical desig...
Amnon H. Eden
ICS
2003
Tsinghua U.
16 years 23 hour ago
AEGIS: architecture for tamper-evident and tamper-resistant processing
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, M...
ISCAS
2007
IEEE
114views Hardware» more  ISCAS 2007»
16 years 1 months ago
On the Suitability of Discrete-Time Receivers for Software-Defined Radio
—CMOS radio receiver architectures, based on radio frequency (RF) sampling followed by discrete-time (D-T) signal processing via switched-capacitor circuits, have recently been p...
Zhiyu Ru, Eric A. M. Klumperink, Bram Nauta